Back-Gate Biasing of the DG Transistors
Soumen Biswas1, Sarosij Adak2
1Soumen Biswas, Department of Electronics and Communication Engineering, Institute Of Engineering and Management, Kolkata, India.
2Sarosij Adak, Department of Electronics and Communication Engineering, Dream Institute of Technology, Kolkata, India.
Manuscript received on April 11, 2012. | Revised Manuscript received on April 14, 2012. | Manuscript published on May 05, 2012. | PP: 240-245 | Volume-2 Issue-2, May 2012 . | Retrieval Number: B0570042212/2012©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: DG-MOSFET programmable logic circuits have noteworthy features such as the ease of re-programming techniques and fewer transistors used in an IC package. Dynamic and reconfigurable threshold logic gates based on DG-MOSFETs are explored. Multiple functions are obtained on a single Boolean static logic circuit built with DG-MOSFETs. Our proposed work is to reconfigurable static and dynamic Boolean logic gates, as well as threshold logic gates designed with DG-MOSFETs. For reconfiguration in these circuits, a systematic back-gate biasing approach is utilized.
Keywords: CMOS integrated circuits, double-gate (DG) transistors, logic circuits