Design of an Ultra Low Power Low Phase Noise CMOS LC Oscillator
Mahdi Ebrahimzadeh, Department of Electrical Engineering, Iran University of Science and Technology (IUST), Tehran, Iran.
Manuscript received on August 13, 2011. | Revised Manuscript received on August 19, 2011. | Manuscript published on September 05, 2011. | PP: 78-81 | Volume-1 Issue-4, September 2011. | Retrieval Number: D088071411/2011©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.
Keywords: LC oscillator, Low Power, Low Phase Noise.