Real-Time Threshold-Voltage Control Theory for Low Power VLSI under Variable Supply Voltage
Anubhuti Khare1, Manish Saxena2, Rishabh Dubey3

1Dr. Anubhuti Khare, Reader, Department of Electronics and Communication, University Institute of Technology, Rajeev Gandhi Technical University, Bhopal, India.
2Manish Saxena, Head Of Electronics and Communication Department, Bansal Institute Of Science and Technology Bhopal, India.
3Rishabh Dubey, Student, M.Tech. (Digital Communication), Bansal Institute of Science & Technology Bhopal, India.
Manuscript received on October 06, 2011. | Revised Manuscript received on October 22, 2011. | Manuscript published on November 05, 2011. | PP: 205-208 | Volume-1 Issue-5, November 2011. | Retrieval Number: E0194101511/2011©BEIESP
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Abstract: In the recent sub-9Onm VLSI generation, a fluctuation exists in a supply voltage due to IR-drop and inductance effects. A supply voltage fluctuation in VISI chips causes large variations in the logic delay time and power consumption. However, in conventional low-power VLSI architecture such as variable threshold voltage CMOS (VTCMOS), the threshed voltage of the transistor is fixed in advance at the system design level. As a result, VTCMOS can’t compensate a supply voltage fluctuation. By employing an adaptive threshold voltage control (ATVC), minimization of power consumption under a time constraint is achieved even in the presence of n supply voltage fluctuation. Optimal granularity is discussed to minimize the total power consumption.
Keywords: Low Power, VLSI, Threshold-Voltage Control, VTCMOS.