FPGA Based Secure System Design-an Overview
Gurjit Singh Walia1, Gajraj Kuldeep2, Rajiv Kapoor3, A K Sharma4, Navneet Gaba5 

1Gurjit Singh Walia, Scientist ‘D’ , Scientific Analysis Group, DRDO, Delhi, India.
2Gajraj Kuldeep, Scientist ‘C’ , Scientific Analysis Group, DRDO, Delhi, India.
3Rajiv Kapoor, Professor and Head, Delhi Technological Univeristy (DCE), Delhi, India.
4A K Sharma, Scientist ‘F’, Scientific Analysis Group, DRDO, Delhi, India.
5Navneet Gaba, Scientist ‘F’, Scientific Analysis Group, DRDO, Delhi, India.
Manuscript received on November 29, 2011. | Revised Manuscript received on December 15, 2011. | Manuscript published on January 05, 2012. | PP: 134-138 | Volume-1 Issue-6, January 2012. | Retrieval Number: F0284111611/2012©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: The implementation of cryptographic algorithm on FPGA is highly addressed in different forums due to its paramount advantages over the other platforms. Most of the secure systems are designed using SRAM based FPGAs with additional security features provided by the manufactures. In this paper, firstly, attempts are made to address different security problems of FPGA based secure systems. The difficulty levels that an attacker may face while implementing an attack are also tabulated. Finally, some constructive recommendation for tackling these security issues are proposed for designing secure systems.
Keywords: Cryptography, FPGA, Secure system, Security, ASIC, SRAM.