An Advanced Online Memory Testing for Fault Diagnostic Systems
Atluri. Jhansi rani1, K. Harikishore2, Fazal Noor Basha3, L. Veera Raju4, K. Purnima5
1A. Jhansi Rani, Department of ECE, K L University, Vijayawada, India.
2Prof. K.Harikishore, Asst. Professor, Department of ECE, K L University, Vijayawada, India.
3Dr. Fazal Noor Basha, Asst. Professor, Department of ECE, K L University, Vijayawada, India,
4L.VeeraRaju, Department of ECE, K L University, Vijayawada, India.
5K. Poornima, Department of ECE, K L University, Vijayawada, India.
Manuscript received on April 11, 2012. | Revised Manuscript received on April 14, 2012. | Manuscript published on May 05, 2012. | PP: 568-571 | Volume-2 Issue-2, May 2012 . | Retrieval Number: B0654042212/2012©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: An increasing part of microelectronic systems is implemented on the basis of pre designed and pre verified modules, so-called cores, which are reused in many instances. Core-providers offer RISC-kernels, embedded memories, DSPs, and many other functions, and built-in self-test is the appropriate method for testing complex systems composed of different cores. The main objective of this project is to designing a system, in such a way that; it is having the capability to detect the faults in the Read only memories. Whether the faults may be Software or Hardware, all faults can be recognized by our designed system. BIST (Built in self test) concept is introduced to detect the faults in the memories. The proposed approach offers a simple test flow and does not require intensive interactions between a BIST controller and a tester. The scheme rests on partitioning of rows and columns of the memory array by employing low cost test logic. It is designed to meet requirements of at-speed test thus enabling detection of timing defects.
Keywords: DSPs, RISC-Kernels, BIST