Comparative Analysis and Study on 4-bit RCA and CSK using CMOS Logic
Suhel Ranjan Mondal1, Monalisa Bhowmik2, Santanu Maity3, Razia Sultana4
1Suhel Ranajan Mondal, B.Tech in Electronics and Communication Engineering at Haldia Institute of Technology, Haldia, India.
2Monalisa Bhowmik, pursuing M.Tech in Microelectronics and VLSI Design at Haldia Institute of Technology, Haldia, India.
3Santanu Maity, Asst. Prof., in Department of ECE at Haldia Institute of Technology, Haldia, India.
4Razia Sultana, Asst. Prof., in Department of ECE at Haldia Institute of Technology, Haldia, India.
Manuscript received on January 02, 2014. | Revised Manuscript received on January 04, 2014. | Manuscript published on January 05, 2014. | PP: 108-111 | Volume-4 Issue-6, January 2014. | Retrieval Number: F2487014615/2015©BEIESP
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© The Authors. Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Adders are the most basic and essential component used in Digital signal processing and is widely used in the digital integrated circuits. In VLSI application area, delay and power are the important factors which must be taken into account in design of a full adder. In this paper a comparative analysis in terms of speed, power consumption and area and PDP for design of 4 bit RCA and CSK is compared by CMOS logic style , quantitatively and qualitatively by performing detailed transistor level simulation using T spice v13.0.
Keywords: Ripple carry Adder, Carry Skip Adder, ,full adder, high speed, low power.